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34 CHAPTER 2. TOY(FD) Programming Examples

Figure 2.2: Basic Modules.

Symbol

Sum

products

equivalence

Figure 2.3: Two-Input Multiplexer Circuit.

TPY(FD) > P == orGate (andGate i0 (notGate i2)) (andGate i1 i2),

P true false true == O

is evaluated to true and produces the substitution O == false. The rules that deﬁne

the behavior can be used to generate circuits, which can be restricted to satisfy some

conditions. If we use the standard arithmetics, we could deﬁne the following set of

rules for computing or limiting the power dissipation.

power :: behavior -> int

power i0 = 0

power i1 = 0

power i2 = 0

power (notGate C) = notGatePower + (power C)

power (andGate C1 C2) = andGatePower + (power C1) + (power C2)

power (orGate C1 C2) = orGatePower + (power C1) + (power C2)

Then, we can submit the goal power B == P, P < maxPower (provided the func-

tion maxPower acts as a problem parameter that returns just the maximum power

allowed for the circuit) in which the function power is used as a behavior generator

As outcome, we get several solutions

Equivalently and more concisely, power B < maxPower could be submitted, but doing so we make

the power unobservable.

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